Senior Design Dec'24 Team 9 • Project Home
Project Overview
Client: The Boeing Company
Advisors: Steve VanderLeest (Boeing), Joe Zambreno (ISU), Phillip Jones (ISU)
The avionics industry is moving towards using multicore systems to meet the demands of modern avionics applications. In multicore systems, interference can affect execution timing behavior, including worst-case execution time (WCET), as identified in the FAA CAST-32A position paper. Examining and verifying the effects of interference is critical in producing safety-critical avionics software for multicore architectures. Multicore processor hardware and operating system providers increasingly offer robust partitioning technologies to help developers mitigate interference effects. These technologies enable partitioning cores for different applications at different criticalities and allow running multiple applications on one specific core. When incorporated into system-design considerations, these partitioning mechanisms reduce the effects of interference on software performance. This project involves taking a reference ARM System on Chip, Xen hypervisor, and applying/creating open-source tooling "interference generators" to exercise the reference system's worst-case characteristics. Boeing will provide an operational scenario for the robustness testing and working loads for embedded hardware.
Planned deliverables for this project include:
Team Members
Hankel Haldin
Hardware Bring-up Engineer
About Me
I am a Computer Engineering student from Fort Dodge, Iowa interested in systems software, networking, and high performance computing. I was drawn to this project due to its wide variety of interesting aspects in terms of hardware, software, and testing. I otherwise wanted to learn more about its application in the avionics field. Most of my internships have been in software. I will be spending summer 2024 interning with General Dynamics Mission Systems in a software engineering role.
Anthony Manschula
Project Coordinator & Memory Subsystem Engineer
About Me
I'm a Computer Engineering student from northern Illinois with an interest in computer architecture and digital design.
This project interested me because I've always had a passion for aviation, and it sounded like a cool intersection of
software and hardware. I'd say my industry experience has prepared me well to contribute to this project and to the team, and
I look forward to my internship at Infineon Technologies in Boston this summer.
Alex Bashara
Embedded & Cache Subsystem Engineer
About Me
I am a Computer Engineer from Omaha, NE. I have a passion for embedded systems and low-level programming.
I wanted to work on this project as I am interested in embedded computer architecures and think that it would allow me to learn more about multicore architectures.
My experience writing firmware for Western Digital, designing embedded systems for Georgia Tech Research Institute, and leading the Electrical subsystem for the ISU Formula SAE team
has prepared me to contribute to this project. After I graduate, I will be joining Rivian as a Software Engineer.
Joseph Dicklin
I/O Subsystem Engineer
About Me
I am an Electrical Engineering student from Ames, IA with a focus in VSLI circuit design and an interest in systems safety. This project plays into both of my passions/strengths by incorperating my aviation industry expereice as well as my technical schooling. I feel like I am prepared to positively contribute my knowledge of analog/digital cirtuits to this team while continuing to learn how to produce a good product.